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general description the max2059 high-linearity digital-variable-gain amplifier (dvga) is designed to provide 56db of total gain range and typical output ip3 and output p1db levels of +31.8dbm and +18.4dbm, respectively. the device is ideal for a variety of applications, including single and multicarrier 1700mhz to 2200mhz dcs 1800/pcs 1900 edge, cdma2000 , wcdma/umts, and td-scdma base stations. the max2059 yields a high level of com- ponent integration, which includes two 5-bit digital attenuators, a two-stage driver amplifier, a loopback mixer, and a serial interface to control the attenuators. the max2059 is pin compatible with the max2058 700mhz to 1200mhz dvga, facilitating an easy design-in for applications where a common pc board layout is used for both frequency bands. the max2059 is available in a 40-pin thin qfn pack- age with an exposed paddle. electrical performance is guaranteed over a -40? to +85? temperature range. applications dcs 1800/pcs 1900 edge base-station transmitters and power amplifiers cdmaone and cdma2000 base-station transmitters and power amplifiers wcdma, td-scdma, and other 3g base-station transmitters and power amplifiers transmitter gain control receiver gain control broadband systems automatic test equipment digital and spread-spectrum communication systems microwave terrestrial links features ? +31.8dbm typical output ip3 ? +18.4dbm typical output 1db compression point ? 1700mhz to 2200mhz rf frequency range ? 700mhz to 1200mhz rf frequency range (max2058) ? 10.9db typical small-signal gain ? includes two independent 5-bit digital attenuator stages, yielding 56db of total gain-control range with 1db steps ? 3-wire spi/microwire compatible ? integrated loopback mixer for tx/rx self- diagnostics ? +5v single-supply operation ? external current-setting resistors for scalable device power ? lead-free package available max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer ________________________________________________________________ maxim integrated products 1 ordering information 19-0566; rev 0; 7/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available * ep = exposed paddle. + denotes lead-free package. t = tape-and-reel. pin configuration/functional diagram appears at end of data sheet. cdma2000 is a registered trademark of telecommunications industry association. cdmaone is a trademark of cdma development group. spi is a trademark of motorola, inc. microwire is a trademark of national semiconductor corp. part temp range pin-package pkg code max2059etl -40c to +85c 40 thi n q fn - e p * (6mm x 6mm) t4066-3 max2059etl-t -40c to +85c 40 thi n q fn - e p * ( 6m m x 6m m ) t4066-3 max2059etl+ -40c to +85c 40 thi n q fn - e p * ( 6m m x 6m m ) t4066-3 max2059etl+t -40c to +85c 40 thi n q fn - e p * ( 6m m x 6m m ) t4066-3
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 2 _______________________________________________________________________________________ absolute maximum ratings dc electrical characteristics (max2059 typical application circuit , v cc = +4.75v to +5.25v, r1 = 1.2k , r2 = 2k , r3 = 2k , t c = -40? to +85?. typical val- ues are at v cc = +5.0v and t c = +25?, unless otherwise noted.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +5.5v rset1, rset2......................................................+1.2v to +4.0v lbbias .......................................................(v cc - 1.5v) to +5.5v lb_en, data, cs , clk .............................-0.3v to (v cc + 0.3v) atten_ina, atten_inb, atten_outa, atten_outb input power .................................................................+24dbm ampin, differential lo input power ...............................+12dbm continuous power dissipation (t a = +70?) 40-pin tqfn (derated 26.3mw/? above +70?) ......2100mw operating temperature range (note a) .............-40? to +85? junction temperature ......................................................+150? jc ....................................................................................10?/w ja ....................................................................................38?/w storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units supply voltage v cc reference to v cc , vcclb, vcclogic, vccbias1, vccbias2, vccamp 4.75 5.0 5.25 v lb mixer disabled (lb_en = 1) 189 241 total supply current i cc lb mixer enabled (lb_en = 0) 217 275 ma logic inputs (data, cs , clk, lb_en) input high voltage v ih 2.4 v input low voltage v il 0.8 v input current with logic-high i ih 0.01 ? input current with logic-low i il 0.01 ? ac electrical characteristics (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, p lo = -6dbm, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units max2058 700 1200 rf frequency (note 2) max2059 1700 2200 mhz small-signal gain a v f rf = 1850mhz, t c = +25? 8.0 10.9 13.3 db t c = -40? to +25? -0.024 gain variation vs. temperature all attenuation settings t c = +25? to +85? -0.032 db/? output power p out p in = 0dbm, f rf = 1850mhz, t c = +25? 8.0 10.9 13.3 dbm 1800mhz to 2000mhz -0.77 output power flatness p in = 0dbm 2000mhz to 2200mhz -2 db attenuation range 56 db output 3rd-order intercept point oip3 two tones: f rf1 = 1850mhz, f rf2 = 1851mhz, p out1 = p out2 = +5dbm 31.8 dbm note a: t c is the temperature on the exposed paddle of the package.
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer _______________________________________________________________________________________ 3 ac electrical characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, p lo = -6dbm, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units output -1db compression point op 1db (note 3) 18.4 dbm rms error vector magnitude evm p out = +12dbm, edge modulation 0.5 % 200khz offset -39.1 400khz offset -72.5 600khz offset -83.1 spurious emissions in 30khz bandwidth p out = +12dbm, edge modulation (note 4) 1.2mhz offset -85.7 dbc noise figure nf 8.1 db input return loss 50 source, minimum attenuation setting 19 db output return loss 50 load, minimum attenuation setting 24 db 5-bit digital attenuators insertion loss attenuator measured separately z s = z l = 50 5db input 3rd-order intercept point iip3 attenuator measured separately z s = z l = 50 , two tones: f rf1 = 1850mhz, f rf2 = 1851mhz, p in1 = p in2 = +5dbm 40 dbm control range (note 5) 28 db 1800mhz to 2000mhz ?.17 attenuation step size variation vs. frequency 2000mhz to 2200mhz ?.29 db 1800mhz to 2200mhz, t c = -40? to +25? ?.011 attenuation variation vs. temperature 1800mhz to 2200mhz, t c = +25? to +85? ?.023 db/? step size 1db relative step accuracy 1800mhz to 2000mhz, all states represented. for steps 0?3db, accuracy is significantly improved. see typical operating characterisitcs . +0.53 -0.97 db absolute step accuracy 1800mhz to 2000mhz, all states represented. for steps 0?3db, accuracy is significantly improved. see typical operating characterisitcs . -3.5 +0.3 db spurious emissions in 300khz bandwidth no rf input, attenuator a stepped from 0 to 2db, 7db to 9db, 15db to 17db, 0 to 31db, 31db to 0db, with attenuator b at 0db; attenuator b stepped from 0 to 2db, 7db to 9db, 15db to 17db, 0 to 31db, 31db to 0db, with attenuator a at 0db (note 6) -89 dbm
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 4 _______________________________________________________________________________________ ac electrical characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, p lo = -6dbm, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units switching speed from chip select transitioning high to the output settling to within 1db of steady state output 0.3 ? loopback mixer lo frequency f lo (note 2) 40 100 mhz lo input power p lo -6 0 dbm output power p in = +5dbm, f rf = 1850mhz, t c = +25? (note 7) -15.4 -12.6 -9.6 dbm 1800mhz to 2000mhz ?.2 gain accuracy p in = +5dbm, t c = -40? to +85? 2000mhz to 2200mhz ?.2 db output 3rd-order intercept point oip3 tw o tones: f rf1 = 1850m h z, f rf2 = 1850.2m hz, p in 1 = p in 2 = + 2d bm , t c = + 25c 6.2 dbm output noise floor p in = +5dbm -137 dbc/hz lb_en enable time 0.12 on/off switching time lb_en disable time 0.12 ? lbout to atten_outb isolation mixer enabled, attenuators a and b both set to 31db, p in = +5dbm 55 db atten_outb to lbout isolation mixer disabled, p in = 0dbm 50 db mixer enabled, 50 load 20 output return loss mixer disabled, 50 load 13 db lo port return loss 50 source 28 db serial peripheral interface (spi) maximum clock speed 38 mhz data to clock setup time t cs 1ns data to clock hold time t ch 9ns clock to cs setup time t es 4ns cs positive pulse width t ew 18 ns cs negative pulse width t ewn 24 ns clock pulse width t cw 13 ns note 1: all limits include external component losses. output measurements taken at rfout or lbout ports of the typical application circuit . note 2: operating outside this range is possible, but with degraded performance of some parameters. note 3: compression point characterized. it is advisable not to continuously operate the vga rf input above +15dbm. note 4: input rf source contribution to spurious emissions (agilent esg 4435b, psa e4443a): 200khz = -39.2dbc, 400khz = -73.5dbc, 600khz = -83.2dbc, 1.2mhz = -85.7dbc note 5: see the applications information section regarding effective attenuation range. note 6: no spi clock input applied. note 7: guaranteed by design and characterization.
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer _______________________________________________________________________________________ 5 typical operating characteristics (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) * off-chip tuning can improve performance for applications beyond 2200mhz. contact factory for details. gain vs. rf frequency* (maximum gain) rf frequency (mhz) gain (db) max12059 toc01 1500 1600 1700 1800 1900 2000 2100 2200 2300 0 2 4 6 8 10 12 14 t c = +25 c t c = +5 c t c = +85 c t c = -40 c gain vs. rf frequency* (maximum gain) rf frequency (mhz) gain (db) max2059 toc02 1500 1600 1700 1800 1900 2000 2100 2200 2300 0 2 4 6 8 10 12 14 v cc = 4.75v v cc = 5.0v v cc = 5.25v gain vs. rf frequency* adjusting atten a rf frequency (mhz) gain (db) max2059 toc03 1500 1600 1700 1800 1900 2000 2100 2200 2300 -25 -15 -5 5 15 atten a abs accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc04 1500 1600 1700 1800 1900 2000 2100 2200 2300 -6 -5 -4 -3 -2 -1 0 1 2 3 states 24?1db atten atten a rel accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc05 1500 1600 1700 1800 1900 2000 2100 2200 2300 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 24db atten 16db atten gain vs. rf frequency* adjusting atten b rf frequency (mhz) gain (db) max2059 toc06 1500 1600 1700 1800 1900 2000 2100 2200 2300 -25 -15 -5 5 15 atten b abs accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc07 1500 1600 1700 1800 1900 2000 2100 2200 2300 -6 -5 -4 -3 -2 -1 0 1 2 3 states 24?1db atten atten b rel accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc08 1500 1600 1700 1800 1900 2000 2100 2200 2300 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 24db atten output ip3 vs. rf frequency* rf frequency (mhz) output ip3 (dbm) max2059 toc09 1700 1800 1900 2000 2100 2200 2300 25 26 27 28 29 30 31 32 33 34 35 t c = +85 c t c = +5 c t c = +25 c t c = -40 c
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 6 _______________________________________________________________________________________ typical operating characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) * off-chip tuning can improve performance for applications beyond 2200mhz. contact factory for details. output ip3 vs. rf frequency* rf frequency (mhz) output ip3 (dbm) max2059 toc10 1700 1800 1900 2000 2100 2200 2300 25 26 27 28 29 30 31 32 33 34 35 v cc = 5.0v v cc = 4.75v v cc = 5.25v noise figure vs. rf frequency* rf frequency (mhz) noise figure (db) max2059 toc11 1700 1800 1900 2000 2100 2200 2300 4 6 8 10 12 14 t c = +85 c t c = +5 c t c = +25 c t c = -40 c noise figure vs. rf frequency* rf frequency (mhz) noise figure (db) max2059 toc12 1700 1800 1900 2000 2100 2200 2300 4 6 8 10 12 14 v cc = 4.75v, 5.0v, 5.25v output p1db vs. rf frequency* rf frequency (mhz) output p1db (dbm) max2059 toc13 1700 1800 1900 2000 2100 2200 2300 14 15 16 17 18 19 20 21 t c = +85 c t c = +25 c t c = +5 c t c = -40 c output p1db vs. rf frequency* rf frequency (mhz) output p1db (dbm) max2059 toc14 1700 1800 1900 2000 2100 2200 2300 14 15 16 17 18 19 20 21 v cc = 4.75v v cc = 5.0v v cc = 5.25v input return loss vs. rf frequency atten a varied rf frequency (mhz) input return loss (db) max2059 toc15 1500 1600 1700 1800 1900 2000 2100 2200 2300 40 35 30 25 20 15 10 5 0 4db 0db 2db 1db 8db 16db, 31db input return loss vs. rf frequency atten b varied rf frequency (mhz) input return loss (db) max2059 toc16 1500 1600 1700 1800 1900 2000 2100 2200 2300 45 40 35 30 25 20 15 10 5 0 31db 0db output return loss vs. rf frequency atten a varied rf frequency (mhz) output return loss (db) max2059 toc17 1500 1600 1700 1800 1900 2000 2100 2200 2300 30 25 20 15 10 5 0 0db 31db output return loss vs. rf frequency atten b varied rf frequency (mhz) output return loss (db) max2059 toc18 1500 1600 1700 1800 1900 2000 2100 2200 2300 30 25 20 15 10 5 0 4db 0db 8db 16db, 31db 1db 2db
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer _______________________________________________________________________________________ 7 typical operating characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) reverse gain vs. rf frequency adjusting atten a and b rf frequency (mhz) gain (db) max2059 toc19 1500 1600 1700 1800 1900 2000 2100 2200 2300 -80 -70 -60 -50 -40 -30 atten a and b, 0db atten a or b, 31db mixer conv loss vs. rf frequency rf frequency (mhz) conversion loss (db) max2059 toc20 1700 1800 1900 2000 2100 2200 2300 10.0 12.5 15.0 17.5 20.0 22.5 25.0 t c = +5 c t c = -5 c t c = +85 c t c = +25 c mixer conv loss vs. rf frequency rf frequency (mhz) conversion loss (db) max2059 toc21 1700 1800 1900 2000 2100 2200 2300 10.0 12.5 15.0 17.5 20.0 22.5 25.0 v cc = 5.0v v cc = 4.75v v cc = 5.25v mixer conv loss vs. rf frequency rf frequency (mhz) conversion loss (db) max2059 toc22 1700 1800 1900 2000 2100 2200 2300 10.0 12.5 15.0 17.5 20.0 22.5 25.0 p lo = 0dbm p lo = -3dbm p lo = -6dbm mixer output ip3 vs. rf frequency rf frequency (mhz) output ip3 (dbm) max2059 toc23 1700 1800 1900 2000 2100 2200 2300 2 3 4 5 6 7 8 9 10 t c = +85 c t c = +5 c t c = +25 c t c = -40 c mixer output ip3 vs. rf frequency rf frequency (mhz) output ip3 (dbm) max2059 toc24 1700 1800 1900 2000 2100 2200 2300 2 3 4 5 6 7 8 9 10 v cc = 4.75v v cc = 5.0v v cc = 5.25v mixer output ip3 vs. rf frequency rf frequency (mhz) output ip3 (dbm) max2059 toc25 1700 1800 1900 2000 2100 2200 2300 2 3 4 5 6 7 8 9 10 p lo = -6dbm p lo = 0dbm p lo = -3dbm mixer output return loss vs. rf frequency (mixer enabled) rf frequency (mhz) mixer output return loss (db) max2059 toc26 1700 1800 1900 2000 2100 2200 2300 40 35 30 25 20 15 10 5 0 t c = +85 c t c = +25 c t c = +5 c t c = -40 c mixer output return loss vs. rf frequency (mixer enabled) rf frequency (mhz) mixer output return loss (db) max2059 toc27 1700 1800 1900 2000 2100 2200 2300 40 35 30 25 20 15 10 5 0 v cc = 4.75v, 5.0v, 5.25v
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 8 _______________________________________________________________________________________ mixer output return loss vs. rf frequency (mixer disabled) rf frequency (mhz) mixer output return loss (db) max2058 toc28 1700 1800 1900 2000 2100 2200 2300 30 25 20 15 10 5 0 t c = +85 c t c = +25 c t c = +5 c t c = -40 c mixer output return loss vs. rf frequency (mixer disabled) rf frequency (mhz) mixer output return loss (db) max2059 toc29 1700 1800 1900 2000 2100 2200 2300 30 25 20 15 10 5 0 v cc = 4.75v, 5.0v, 5.25v lo return loss vs. lo frequency (mixer enabled) lo frequency (mhz) lo return loss (db) max2059 toc30 0 50 100 150 200 40 30 20 10 0 t c = -40 c t c = +5 c t c = +25 c t c = +85 c lo return loss vs. lo frequency (mixer enabled) lo frequency (mhz) lo return loss (db) max2059 toc31 0 50 100 150 200 40 30 20 10 0 v cc = 4.75v, 5.0v, 5.25v atten a only (no pc board loss) gain vs. rf frequency rf frequency (mhz) gain (db) max2059 toc32 1500 1600 1700 1800 1900 2000 2100 2200 2300 -40 -30 -20 -10 0 atten a only abs accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc33 1500 1600 1700 1800 1900 2000 2100 2200 2300 -6 -5 -4 -3 -2 -1 0 1 2 3 states 24db?1db atten atten a only rel accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc34 1500 1600 1700 1800 1900 2000 2100 2200 2300 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 24db atten typical operating characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.)
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer _______________________________________________________________________________________ 9 atten b only (no pc board loss) gain vs. rf frequency rf frequency (mhz) gain (db) max2059 toc35 1500 1600 1700 1800 1900 2000 2100 2200 2300 -40 -30 -20 -10 0 atten b only abs accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc36 1500 1600 1700 1800 1900 2000 2100 2200 2300 -6 -5 -4 -3 -2 -1 0 1 2 3 states 24db?1db atten atten b only rel accuracy vs. rf frequency rf frequency (mhz) error (db) max2059 toc37 1500 1600 1700 1800 1900 2000 2100 2200 2300 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 24db atten typical operating characteristics (continued) (max2059 typical application circuit , v cc = +4.75v to +5.25v, digital attenuators set for maximum gain, 1700mhz f rf 2200mhz, 40mhz f lo 100mhz, t c = -40? to +85?. typical values are at v cc = 5.0v, p in = 0dbm, f rf = 1850mhz, f lo = 95mhz, f lbout = f rf - f lo , and t c = +25?, unless otherwise noted.) supply current vs. supply voltage (mixer disabled) v cc (v) supply current (ma) max2059 toc38 4.750 4.875 5.000 5.125 5.250 160 170 180 190 200 210 220 t c = +85 c t c = +5 c t c = -40 c t c = +25 c supply current vs. supply voltage (mixer enabled) v cc (v) supply current (ma) max2059 toc39 4.750 4.875 5.000 5.125 5.250 180 190 200 210 220 230 240 t c = +85 c t c = +5 c t c = -40 c t c = +25 c
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 10 ______________________________________________________________________________________ pin description pin name function 1 lo+ loopback mixer local oscillator positive input 2 lo- loopback mixer local oscillator negative input 3 vcclb loopback mixer supply voltage. +5v supply for the internal loopback mixer. bypass to gnd with 22pf and 0.1? capacitors as close as possible to the pin. 4 lbout loopback mixer rf output. internally matched to 50 . ac-couple with a capacitor. 5 lb_en loop b ack m i xer log i c inp ut. s et to l og i c- l ow 0 to enab l e the m i xer . s et to l og i c- hi g h 1 to d i sab l e the m i xer . 6 data spi digital data input 7 clk spi clock input 8 cs spi chip-select input 9 vcclogic logic supply voltage. +5v supply for the internal logic circuitry. bypass to gnd with 22pf and 0.1? capacitors as close as possible to the pin. 10, 11, 13, 14, 16, 17, 19, 22, 24, 25, 26, 30, 32, 34, 35, 37, 38 gnd ground 12 atten_outb attenuator b output. internally matched to 50 . 15 v cc attenuator b supply. +5v supply for attenuator b. bypass to gnd with 22pf and 0.01? capacitors as close as possible to the pin. 18 atten_inb attenuator b input. internally matched to 50 . 20 rset2 output amplifier bias-current-setting resistor. sets the bias current for the output amplifier stage. connect a 2k resistor to ground. 21 vccbias2 bias circuit supply voltage. +5v supply for the internal bias circuitry. bypass to gnd with 1000pf and 0.1? capacitors as close as possible to the pin. 23 ampout rf amplifier output. internally matched to 50 . 27 vccamp rf amplifier supply voltage. +5v supply for the rf amplifier. bypass to gnd with 1000pf and 0.1? capacitors as close as possible to the pin. 28 ampin rf amplifier input. internally matched to 50 . 29 vccbias1 bias circuit supply voltage. +5v supply for the internal bias circuitry. bypass to gnd with 1000pf and 0.1? capacitors as close as possible to the pin. 31 rset1 input amplifier bias-current-setting resistor. sets the bias current for the input amplifier stage. connect a 1.2k resistor to ground. 33 atten_outa attenuator a output. internally matched to 50 . 36 v cc attenuator a supply voltage. +5v supply for attenuator a. bypass to gnd with 22pf and 0.01? capacitors as close as possible to the pin. 39 atten_ina attenuator a input. internally matched to 50 . 40 lbbias loopback mixer bias-current-setting resistor. sets the bias current for the mixer. connect a 2k resistor to ground. ep ep exposed ground paddle. solder the exposed paddle to gnd using multiple vias.
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer ______________________________________________________________________________________ 11 detailed description the max2059 high-linearity dvga consists of two 5-bit digital attenuators, a fixed-gain two-stage driver amplifi- er, a loopback mixer, and a serial interface to control the attenuators. this high level of component integra- tion makes the max2059 ideal for base-station trans- mitter applications. the max2059 is designed to operate in the 1700mhz to 2200mhz frequency range. the overall cascaded performance of the max2059 produces a typical 10.9db gain, a +31.8dbm oip3, an 18.4dbm op1db, and a total 56db gain-control range. 5-bit attenuators the max2059 integrates two 5-bit digital attenuators to achieve a high dynamic range. each attenuator is pro- grammed with a 3-wire spi interface, with a total effec- tive range of 28db and step size of 1db. see the applications information section and table 1 for attenu- ator programming details. the attenuators can be used for both static and dynamic power control. driver amplifier the max2059 includes a two-stage medium power amplifier with a fixed 18.5db gain. the driver amplifier circuit is optimized for high linearity and medium output power capability for the 1800mhz to 2000mhz frequen- cy range. the driver amplifier is intended to amplify a modulated signal and drive a high-power amplifier in base-station transmitters. in a typical application, the driver amplifier is cascaded in between the two digital attenuators. see the typical application circuit. the two-stage amplifier stage can be disabled for applications where only the digital attenuators and/or loopback mixer are used. to disable the two-stage amplifier, ground or leave unconnected the amplifier supplies vccbias2, vccamp, vccbias1, and also the inputs for setting the amplifier bias currents rset1, rset2. this reduces the supply current by approxi- mately 187ma under typical conditions. loopback mixer the max2059 loopback mixer uses a double-balanced active architecture designed to operate with a 1700mhz to 2200mhz rf frequency range, and a 40mhz to 100mhz lo frequency range. the rf port of the mixer is connected internally (with an on-chip switch) to the input of the first attenuator stage. the mixer? if port is matched for a single-ended 50 impedance, while the lo port requires a differential input impedance of 100 . the loopback mixer facilitates a self-diagnostic mode for cellular transceivers, whereby the tx band signal at the input of the mixer can be translated up or down to the corresponding rx band. this translated signal can then be fed back to the radio? receiver for complete tx/rx loop diagnostics. the loopback mixer is enabled and disabled with lb_en. set lb_en to a logic-low 0 to enable the mixer, set lb_en to a logic-high 1 to disable the mixer. the max2059 loopback mixer accepts a nominal -6dbm lo input power and exhibits a -12.6dbm output power and an output ip3 of 6.2dbm (p in = +5dbm). applications information spi interface and attenuator settings the two 5-bit attenuators are programmed with the 3- wire spi/microwire-compatible serial interface using 10-bit words. bit 9 of the 10-bit data is shifted in first, along with all remaining data bits, on the rising edge of the clock regardless of cs being high or low. once all the data bits are shifted in, all will be sent to the attenua- tors on the rising edge of cs , thus changing the attenua- tion state. for standard spi operation, pull cs low for the attenuator a (5 msbs) attenuator b (5 lsbs) bit 9 = 16db step bit 4 = 16db step bit 8 = 8db step bit 3 = 8db step bit 7 = 4db step bit 2 = 4db step bit 6 = 2db step bit 1 = 2db step bit 5 = 1db step bit 0 = 1db step notes: data entered on clock rising edge. attenuator state change on cs rising edge. msb data clock cs bit 9 bit 8 bit 1 bit 0 lsb t cs t ch t cw t ewn t es t ew table 1. attenuator programming figure 1. spi timing diagram note: due to finite circuit isolation, the total effective range of each attenuator is limited to 28db.
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer 12 ______________________________________________________________________________________ max2058/max2059 90 dual dac quad amp zero-if mods/demods rf digital vgas max9491 vco + pll i 12 q 12 spi logic 31db spi control loopback out (feeds back into rx chain front-end) rx off 45, 80, or 95mhz lo 18.5db rfout 31db 0 max5873 max4395 max2021/max2022/MAX2023 figure 2. direct conversion transmitter for gsm/edge base stations duration of a valid 10-bit data set (t ewn ). this cs nega- tive pulse width includes the setup time of the rising clock edge to cs transitioning high (t es ). see figure 1. the 5 msbs of the 10-bit word program attenuator a, and the 5 lsbs of the 10-bit word program attenuator b. each bit sets the attenuators to a corresponding attenuation level. for example, logic-low 0 for bit 5 and bit 0 of attenuator a and b, respectively, sets both attenuators at 1db. 00000 configures both attenuators for maximum attenuation and 11111 sets for minimum attenuation. see table 1 for programming details. external bias bias currents for the two-stage amplifier and the loop- back mixer are set and optimized with external resistors. resistor r1 (pin 31) sets the bias current for the input amplifier, r2 (pin 20) sets the bias current for the output amplifier, and r3 (pin 40) sets the bias for the loopback mixer. the external biasing resistor values can be increased for reduced current operation at the expense of performance. contact the factory for details. board layout the pin configuration of the max2059 has been opti- mized to facilitate a very compact physical layout of the device and its associated discrete components. the exposed paddle (ep) of the max2059? thin qfn- ep package provides a low thermal-resistance path to the die. it is important that the pc board on which the max2059 is mounted be designed to conduct heat from the ep. in addition, provide the ep with a low- inductance path to electrical ground. the ep must be soldered to a ground plane on the pc board, either directly or through an array of plated via holes. component value description c1, c4, c10, c13, c16 0.1? microwave capacitors (0603) c2, c3, c5, c8, c11, c14, c17, c24 22pf microwave capacitors (0402) c6, c19 120pf microwave capacitors (0402) c7, c18 0.01? microwave capacitors (0402) c9, c12, c15 1000pf microwave capacitors (0402) c20, c21, c22 0.75pf microwave capacitors (0402) c23 1pf microwave capacitor (0402) r1 1.2k ?% resistor (0402) r2, r3 2.0k ?% resistors (0402) r4 110 ?% resistor (0402) ti 2:1 rf transformer (100:50) mini-circuits tc2-1t u1 max2059 table 2. component list referring to the typical application circuit
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer ______________________________________________________________________________________ 13 max2059 30 29 28 27 26 36 35 34 33 32 31 r1 gnd gnd gnd gnd gnd ampout r2 c19 c17 c22 c18 c1 c2 c3 v cc v cc v cc c7 c21 c8 rf input v cc gnd gnd gnd gnd gnd rset1 atten_outb atten_inb attn_ina atten_outa lbbias 40 39 38 37 15 16 17 18 19 20 11 12 13 14 25 23 21 24 22 5 4 3 2 9 8 10 7 6 1 r3 t1 r4 lo+ lo- vcclb vcclogic driver amp vccbias2 lbout lb_en data clk cs gnd gnd gnd rset2 gnd gnd gnd gnd v cc 5-bit attenuator b spi e.p. 5-bit attenuator a lo input lbout rf output c4 c5 c6 v cc c10 c11 c14 c9 v cc vccamp ampin vccbias1 c13 c12 v cc c16 c15 c20 c24 c23 typical application circuit direct-conversion base-station transmitter the max2058/max2059 are designed to interface directly with maxim? direct-conversion quadrature modulators and high-speed dacs to provide a com- plete solution for gsm/edge base-station transmitter applications. see figure 2. the max2058/max2059, together with the max2021/max2022/MAX2023 direct- conversion modulators/demodulators, the max5873 dual-channel dac, and the max4395 quad amplifier, form an ideal total transmitter lineup. this overall sys- tem is highly efficient and low cost, while maintaining high linearity and low-noise performance.
max2059 1700mhz to 2200mhz high-linearity, spi-controlled dvga with integrated loopback mixer maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 14 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products is a registered trademark of maxim integrated products, inc. package information for the latest package outline information, go to www.maxim-ic.com/packages . max2059 30 29 28 27 26 36 35 34 33 32 31 40 39 38 37 15 16 17 18 19 20 11 12 13 14 25 23 21 24 22 5 4 3 2 9 8 10 7 6 1 driver amp 5-bit attenuator b spi 5-bit attenuator a gnd gnd gnd gnd gnd ampout v cc gnd gnd gnd gnd gnd rset1 atten_outb atten_inb atten_ina atten_outa lbbias lo+ lo- vcclb vcclogic vccbias2 lbout lb_en data clk cs gnd gnd gnd rset2 gnd gnd gnd gnd v cc vccamp ampin vccbias1 pin configuration/functional diagram chip information process: sige bicmos

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